Pulse signal output circuits for generating a pulse signal and outputting the pulse signal have been used in various applications. For example, in Japanese Patent Application Publication Laid-Open No. 2013-222978 (hereinafter, referred to as Patent Literature 1), a technology for a pulse signal output circuit usable to transmit a process quantity measured by a field indicator installed at the processing site by a pulse signal is disclosed. The pulse signal output circuit disclosed in Patent Literature 1 includes a switch section, a primary-side capacitor, a pulse transformer, a rectifying section, a secondary-side capacitor, a resistor, and a field effect transistor (FET). Further, the pulse signal output circuit disclosed in Patent Literature 1 generates a pulse signal by turning on or off each of switches included in the switch section connected to a DC power supply, and outputs the pulse signal.
Specifically, in the pulse signal output circuit disclosed in Patent Literature 1, in order to switch the pulse signal to be output, to the low level, each of the switches included in the switch section is turned on or off such that the current output from the DC power supply is applied to the primary side of the pulse transformer via the primary-side capacitor. In this case, in the pulse signal output circuit disclosed in Patent Literature 1, the pulse transformer is excited by the current applied to the primary side, whereby voltage attributable to the voltage between both terminals of the primary coil is induced between both terminals of the secondary coil. Thereafter, in the pulse signal output circuit disclosed in Patent Literature 1, the voltage induced on the secondary side by the pulse transformer is subjected to full-wave rectification by the rectifying section, and is applied between the gate and source of the FET and between the terminals of each of the secondary-side capacitor and the resistor. Therefore, in the pulse signal output circuit disclosed in Patent Literature 1, by the voltage subjected to full-wave rectification, the secondary-side capacitor is changed, and the FET is switched on, and the pulse signal transitions to the low level. In the pulse signal output circuit disclosed in Patent Literature 1, if a switch included in the switch section provided on the primary side of the pulse transformer is switched from the OFF state to the ON state, a large amount of current temporarily flows in the secondary-side circuit of the pulse transformer. Thereafter, the current flowing in the secondary-side circuit decreases and becomes 0 A. Therefore, in the pulse signal output circuit disclosed in Patent Literature 1, the voltage which is applied between the source and gate of the FET and between the terminals of each of the secondary-side capacitor and the resistor also decreases. However, in the pulse signal output circuit disclosed in Patent Literature 1, if the current flowing in secondary-side circuit of the pulse transformer becomes 0 A, the charge stored in the secondary-side capacitor is released, so the FET is maintained in the ON state, and the pulse signal also is maintained at the low level.
Also, in the pulse signal output circuit disclosed in Patent Literature 1, the switch section is configured to be switched on or off such that the direction of application of the current output from the DC power supply to the primary side of the pulse transformer is reversed. More specifically, in the pulse signal output circuit disclosed in Patent Literature 1, the switch section has a switch for applying the current in the positive direction (hereinafter, referred to as the “positive-direction switch”), and a switch for applying the current in the negative direction (hereinafter, referred to as the “negative-direction switch”). Further, in the pulse signal output circuit disclosed in Patent Literature 1, switching of each of the positive-direction switch and the negative-direction switch between the ON state and the OFF state is exclusively (complementarily) controlled. In other words, in the pulse signal output circuit disclosed in Patent Literature 1, when the positive-direction switch is switched on, the negative-direction switch is switched off, whereby the current is applied in the positive direction to the primary side of the pulse transformer; whereas when the negative-direction switch is switched on, the positive-direction switch is switched off, whereby the current is applied in the negative direction to the primary side of the pulse transformer. Therefore, in the pulse signal output circuit disclosed in Patent Literature 1, when the switch section applies the current in the negative direction to the primary side of the pulse transformer, in the pulse transformer, the reverse voltage is induced between both terminals of the secondary coil. Therefore, in the pulse signal output circuit disclosed in Patent Literature 1, the direction of the current flowing in the secondary side of the pulse transformer also is reversed.
However, in the pulse signal output circuit disclosed in Patent Literature 1, since the voltage induced on the secondary side is subjected to full-wave rectification by the rectifying section, even when the reverse voltage is induced on the secondary side of the pulse transformer, the voltage having the same state as the state when the switch section applies the current in the positive direction to the primary side of the pulse transformer is applied between the terminals of each of the secondary-side capacitor and the resistor. In other words, in the pulse signal output circuit disclosed in Patent Literature 1, even when the pulse transformer causes the reverse voltage is induced on the secondary side of the pulse transformer, the voltage between the gate and source of the FET rises. Therefore, in the pulse signal output circuit disclosed in Patent Literature 1, even when the switch section applies the current in the negative direction to the primary side of the pulse transformer, the FET is maintained in the ON state, and the pulse signal also is maintained at the low level.
Meanwhile, in the pulse signal output circuit disclosed in Patent Literature 1, in order to switch the pulse signal to the high level, the states of the switches included in the switch section are maintained in their states. Then, in the pulse signal output circuit disclosed in Patent Literature 1, the voltage which is induced on the secondary side by the pulse transformer becomes constant without changing. In other words, in the pulse signal output circuit disclosed in Patent Literature 1, the direction of the voltage which is induced on the secondary side of the pulse transformer is fixed to any one direction of the positive direction and the negative direction, and the direction of the current also is fixed to one direction. Therefore, in the pulse signal output circuit disclosed in Patent Literature 1, if the current flowing in the secondary-side circuit of the pulse transformer becomes 0 A, and all of the charge stored in the secondary-side capacitor is released, the FET is switched off, and the pulse signal transitions to the high level.
As described above, in the pulse signal output circuit disclosed in Patent Literature 1, each of the switches included in the switch section connected to the DC power supply is switch on or off, whereby the FET is switched on or off. As a result, the pulse signal is generated.
By the way, like in the pulse signal output circuit disclosed in Patent Literature 1, the primary side and the secondary side are insulated from each other in direct-current wise by the pulse transformer. The primary side and secondary side of the pulse transformer are coupled in alternate-current wise. Therefore, in the case where the degree of AC coupling is low, the amount of power which is transmitted from the primary side of the pulse transformer to the secondary side is small. For this reason, it is required to improve the efficiency of transmission of power from the primary side to the secondary side.
However, in the pulse signal output circuit disclosed in Patent Literature 1, since the voltage between the terminals of each of the primary coil and secondary coil of the pulse transformer oscillates due to attributable to series resonance of the inductance component of the primary side of the pulse transformer and the primary-side capacitor (such oscillation is called ringing), depending on the timing when the switches included in the switch section are switched on or off, when the switches are switched, the voltage value of the voltage may decrease by a value depending on oscillation. In this case, the amount of power which is transmitted from the primary side to the secondary side decreases, and the efficiency of transmission of power from the primary side of the pulse transformer to the secondary side decreases (the details will be described below with reference to FIG. 12).
Now, an example of the case where in the pulse signal output circuit disclosed in Patent Literature 1, the efficiency of transmission of power from the primary side of the pulse transformer to the secondary side decreases will be described. FIG. 12 is a timing chart illustrating an example of the case where the power transmission efficiency in the pulse signal output circuit of the related art decreases. FIG. 12 shows an example of the ON/OFF states of the positive-direction switch and the negative-direction switch which are controlled in the pulse signal output circuit disclosed in Patent Literature 1 in order to switch the pulse signal to be output to the low level, and the voltage and current of the primary side of the pulse transformer (the primary-side voltage and the primary-side current) which change according to the states of the switches. Also, it can be said that the waveform of the primary-side voltage shown in FIG. 12 is the same as the waveform of the voltage of the secondary side of the pulse transformer (the secondary-side voltage) although the primary-side voltage and the secondary-side voltage are different in voltage value.
In the timing chart shown in FIG. 12, at a timing t0, a timing t1, and a timing t2, each of the positive-direction switch and the negative-direction switch is switched on or off. As shown in FIG. 12, if each of the positive-direction switch and the negative-direction switch is switched on or off, the primary-side voltage of the pulse transformer oscillates due to series resonance of the inductance component of the primary side of the pulse transformer and the primary-side capacitor. Also, the primary-side current of the pulse transformer oscillates according to the oscillation of the primary-side voltage. Also, the oscillation frequency of the primary-side voltage is determined according to the inductance value of the inductance component of the primary side of the pulse transformer and the capacitance value of the primary-side capacitor, and the degree of damping of oscillation is determined according to the resistance value of each of the positive-direction switch and the negative-direction switch in the ON state, and the resistance value of the primary coil of the pulse transformer.
In the timing chart shown in FIG. 12, the waveform of the primary-side voltage around the timing t1 when the positive-direction switch and the negative-direction switch are switched is worth noticing. At the timing t1, the positive-direction switch and the negative-direction switch are switched, whereby the current is applied in the negative direction to the primary side of the pulse transformer. As a result, the primary-side voltage changes to negative voltage. By the way, at the timing t0, the positive-direction switch and the negative-direction switch are switched, whereby the current is applied in the positive direction to the primary side of the pulse transformer, so the primary-side voltage changes to positive voltage. Thereafter, the primary-side voltage oscillates due to series resonance of the inductance component of the primary side of the pulse transformer and the primary-side capacitor. However, the oscillation of the primary-side voltage does not converge until the timing immediately before the timing t1 when the switches are switched, and at the timing t1, the primary-side voltage has a voltage value of Va. For this reason, at the timing t1, the primary-side voltage changes to a voltage value of −V+Va, i.e. a negative voltage higher than −V by Va. In FIG. 12, it is shown that since the direction of the primary-side voltage is switched to the negative direction at the timing t1, the primary-side voltage drops to the voltage higher than the voltage of −V by the voltage value of Va, not to the voltage of −V. In this case, the secondary-side voltage which is induced on the secondary side of the pulse transformer also changes similarly. Therefore, in the pulse signal output circuit of the related art, the amount of power which is transmitted from the primary side of the pulse transformer to the secondary side decreases, and the efficiency of transmission of power from the primary side to the secondary side decreases.
Also, in FIG. 12, it is shown that at the timing t2 when the positive-direction switch and the negative-direction switch are switched, since oscillation of the primary-side voltage has converged, the primary-side voltage changes to the voltage of +V, not to a voltage lower than voltage of +V. However, even at the timing t2 shown in FIG. 12, if oscillation of the primary-side voltage has not converged, similarly, the primary-side voltage changes to a voltage lower than the voltage of +V, and the secondary-side voltage which is induced on the secondary side by the pulse transformer also changes, and the efficiency of transmission of power from the primary side to the secondary side decreases.
The present invention was made in view of the above-mentioned problem, and an object of the present invention is to provide a pulse signal output circuit which has a configuration using a pulse transformer insulating the primary side and the secondary side from each other, and can improve the efficiency of transmission of power from the primary side of a pulse transformer to the secondary side.